

SRAM locations moved around as well (SRAM A1 at 0x2000 now).heavily changed memory map (UART0 at 0x05000000, for instance).Programming model/driver level differences though only connected to display controller and video codecs.

totally undocumented software interface.addition of PCIe support (broken, see below).The initial support for the SoC will be added in kernel 4.17ĭifferences / New features (compared to H5) High level differences See Mainlining Effort and Mainline U-Boot for support status.

